TUTORIALS

 

T1: Radio Design for 3G Wireless and Beyond

 

Mohammed Ismail

Professor, Ph.D. 1983, University of Manitoba, Canada.
Areas of interest: Analog and mixed signal VLSI design, low voltage/low power VLSI, RF CMOS, microelectronics, neural hardware.
Department of Electrical Engineering
205 Dreese Labs; 2015 Neil Avenue
Columbus, OH 43210
office: 300 CL, Phone: 614.292.0351, Fax: 614.292.7596
E-mail: ismail@ee.eng.ohio-state.edu
Click here to visit Professor Ismail's web page.

 

 

ABSTRACT
As we move from third generation ( 3G ) to 4G to meet the demand for higher data rates and shorter distances at  "hotspots" , a debate has ensued on whether cellular and WLAN are seen as complementary or competing technologies. In either case, wireless services are moving to all-IP, convergent wireless solutions requiring access to different wireless infrastructures from the same wireless device, be it a cell phone,
a laptop or a PDA for a multitude of services including voice, data and multimedia applications. This scenario requires development of complex multi-standard multi-mode chipsets. This tutorial will discuss chipset technologies for wireless applications with focus on radio transceiver design .we will fist review the evolution of radio technology for 2G and 3G.We will then discuss multi-standard radio design solutions for 4G convergent WLAN/UMTS handhelds .The material will be covered at an introductory level. Students and newcomers are particularly welcome to participate.


BIOGRAPHY
Mohammed Ismail is Professor and Founding Director of the Analog VLSI Lab at the Ohio State University, Columbus, USA .He serves as a corporate consultant to semiconductor companies in the US, Europe and the far East. Recently he co-founded Spirea AB, Stockholm ,a leading developer for Radio-on-CMOS technology for the wireless market and serves as the company's Chief Technology Officer .He is a fellow of IEEE.

   

T2:Missing Sensor Data Restoration
 

 

Mohamed A. El-Sharkawi
Professor
Energy Systems
M306 EE/CSE
Box 352500
Department of Electrical Engineering
University of Washington Vice President for Technical Activities, IEEE Neural Networks Society
Seattle, WA 98195-2500
Phone: (206) 685-2286,
Fax: (206) 543-3842
Email: elsharkawi@ee.washington.edu
Web page:  http://cialab.ee.washington.edu

 

ABSTRACT

Consider the case where a plurality of sensors produces readings associated in a possibly nonlinear manner.  In certain scenarios, these readings may be related in such a manner as to allow restoration of one or more lost readings from those remaining.  Missing sensor data (MISED) restoration can be accomplished by recognition or discovery of a constraint placed on the readings from a sensor bank. The constraints, in turn, can be used to establish data dependency. 

Constraint imposition on data sets is traditionally assigned to a human expert charged with data set modeling.  From the physics of the data generation or other process limitations, an expert can often heuristically impose constraints.  Examples of constraints imposed on a sensor bank array include minimum phase, symmetry, band limited, strictly increasing and non-negativity constraints.   Model imposition of constraints allows powerful representation of data generated by the sensor bank.  In contrast to model (or expert) constraint declaration, we propose to let the data discover its own constraints.  In many important cases, we submit that empirical constraint discovery

(a) can be used on data bases where no modeled set constraint  is obvious.
(b) may discover new subtle but important data constraints and
(c) will generally result in more restrictive and accurate constraints than is the case with expert constraint imposition.

Data set constraints imposed either empirically or by expert allow data set element representation in a lower dimension. 
Doing so, in many important cases, lets values of failed sensors be accurately estimated from those sensor readings remaining.

BIOGRAPHY

Mohamed A. El-Sharkawi is a Fellow of IEEE and is a Professor of Electrical Engineering and the Associate Chair at the University of Washington. He received his Ph.D. in Electrical Engineering from the University of British Columbia in 1980. He is the founder of the international conference on the Application of Neural Networks to Power Systems (ANNPS) and Co-founder of the international conference on Intelligent Systems Applications to Power (ISAP). He is a member of the administrative committee of the IEEE Neural Networks Council representing the Power Engineering Society, Video Tutorial Chair of the IEEE Continuing Education Committee and founding Chairman of several IEEE task forces and working groups and subcommittees.

 

 

T3: MEMS and Their Applications
 

 

M.E.Zaghloul

Professor
The director of the Institute of MEMS and VLSI Technologies
at the School of Engineering and Applied Science, GWU.
The George Washington University
Washington D.C., USA, 20052
Office: Room 620 Phillips Hall
Phone: 202 994-3772
Fax: 202 994-0227
Email: zaghloul@gwu.edu

 

 

ABSTRACT

This is a basic introductory course to MEMS. The course will allow engineers to learn the basic of MEMS design and Fabrications. It will give an overview of MEMS design, fabrications, and applications in basic commercial sensors product. Applications of MEMS to RF- Communication and   RF-MEMS devices will be included.

Topics to be covered:

MEMS Fundamentals, Design and Fabrications.

Introduction, examples of commercial MEMS, MEMS classes, Infrastructure needed.

Access to Fabrication Facility, what is in fabrication facility needed.

Pprocedure for design, Comparison to standard VLSI, MEMS CAD tools.

Micromachining techniques, Bulk Micromachining, Surface Micromachining, examples of silicon Sensors, brief description to varieties of silicon sensors.

Applications of MEMS

MEMS Classifications. Examples of MEMS applications in Transportation, Medical,  and Communication. RF-MEMS concepts, examples of design and prospect in RF-Communications.

BIOGRAPHY

Her main research interests are in the areas of digital and analog design of VLSI circuits, VLSI systems applications, design and implementation of microelectromechanical devices (MEMS) and RF-MEMS. She consults at the National Institute of Standards and Technology (NIST), where she is actives with the MEMS Project and collaborates with the   IC Technology Group in the Semiconductor Electronics Division. She has  published over 160 technical papers in the general Areas of Circuits and Systems, Microelectronics systems design,VLSI circuits design, and MicroElectromechanical systems. She has also contributed to several books. She is the director of the Institute of MEMS and VLSI Technologies at the School of Engineering and Applied Science, George Washington University.

 

 

T4: H.264/MPEG-4 Part 10
 

 

K.R.Rao
Professor
IEEE Fellow
Electrical Engineering Department, UTA, 416 Yates Street
Box 19016
Arlington, TX 76019 USA
Tel:1-817-272-3478
Fax;1-817-272-2253
E-mail: rao@uta.edu
Webpage: www-ee.uta.edu/dip

  ABSTRACT

The video coding standards to date have not been able to address all the needs required by varying bit rates of different applications and the at the same time meeting the quality requirements. An emerging video coding standard named H.264/MPEG-4 part 10 (IS in May 2003) aims at coding video sequences at approximately half the bit rate compared to MPEG-2 at the same quality. It also aims at having significant improvements in coding efficiency, error robustness and network friendliness. It makes use of better prediction methods for Intra (I), Predictive (P) and Bi-predictive (B) frames. Arbitrary Block-size Transform (ABT) is used which is a simplified transform that avoids the mismatch error (DCT/IDCT) observed in the motion compensation hybrid coding adopted in MPEG-1 and MPEG-2. All these features along with others such as CABAC (Context Based Adaptive Binary Arithmetic Coding) have resulted in having a 2:1 coding gain over MPEG-2 at the cost of increased complexity. Other parts of this standard such as file format, verification testing, reference software, conformance bitstreams , standardizing example encoding description and potential extensions are being finalized soon. The seminar highlights the various functionalities of the encoder, points out the differences between this new standard and the existing standards and describes the state-of-the-art development by the industry. ftp and web sites related to documents, software, databases, conformance bitstreams, meeting schedules, vendors, file formats, research groups etc are provided. This standard opens up several research areas based on software/hardware implementations, improvements etc. Also projects at the undergraduate and graduate levels can be assigned.

BIOGRAPHY

K.R. Rao received the Ph. D. degree in electrical engineering from The University of New Mexico, Albuquerque in 1966.  Since 1966, he has been with the University of Texas at Arlington where he is currently a professor of electrical engineering.  He, along with two other researchers, introduced the Discrete Cosine Transform in 1975 which has since become very popular in digital signal processing. He is the co-author of the books “Orthogonal Transforms for Digital Signal Processing” (Springer-Verlag, 1975), “Fast Transforms: Analyses and Applications” (Academic Press, 1982), “Discrete Cosine Transform-Algorithms, Advantages, Applications” (Academic Press, 1990). He has edited a benchmark volume, “Discrete Transforms and Their Applications” (Van Nostrand Reinhold, 1985). He has co edited a benchmark volume, “Teleconferencing” (Van Nostrand Reinhold, 1985). He is co-author of the books, “Techniques and standards for Image/Video/Audio Coding” (Prentice Hall) 1996 “Packet video communications over ATM networks”(Prentice Hall) 2000 and “Multimedia communication systems” (PrenticeHall) 2002. He has co edited a handbook “ The transform and data compression handbook,” ( CRC Press, 2001). Some of his books have beentranslatedinto Japanese, Chinese Korean and Russian. He has conducted workshops/tutorials on video/audio coding/standards worldwide. He has supervised several students at the Masters and Doctoral levels. He has published extensively in refereed journals and has been a consultant to industry, research institutes and academia. He is a Fellow of the IEEE.

 

 

T5: Design Of Embedded Analog Blocks In Mixed-Signal VLSI Systems.
 

 

Georges G.E. Gielen
Professor in Electrical Engineering at the
Katholieke Universiteit Leuven , Belgium
Email: Georges.Gielen@esat.kuleuven.ac.be

 

ABSTRACT

This tutorial will present techniques for the embedding of analog blocks in mixed-signal VLSI systems. Aspects covered include both circuit design challenges and emerging tool/methodology solutions. Focus will be on data converters. Systematic design approaches for deep-submicron converters will be described. Also the effects of embedding the blocks in digital systems, such as substrate noise coupling, will be handled and solutions will be described.

BIOGRAPHY

Georges G.E. Gielen is a Professor in Electrical Engineering at the Katholieke Universiteit Leuven , Belgium. His research interests are in analog and mixed-signal design and design automation. He is responsible for many industrial projects in this area, he has published more than 150 papers in books, journals and conference proceedings, and is invited regularly for program committees of conferences and for presenting tutorials and invited speeches on analog and mixed-signal design and CAD. He is a member of the Board of Governors of the IEEE Circuits and Systems Society. He was the 1997 Laureate of the Belgian National Academy of Science, Literature and Arts in the category of engineering sciences, and he received the 2000 Alcatel Award for innovation in telecommunications from the Belgian National Fund of Scientific Research.

 

 

T6:Testing and Verification of Multimillion Trs. Chips
 

 

Magdy S. Abadir
Manager, High Performance Tools and methodology
Somerset Design Center, NCSG, SPS
Motorola Inc., Austin Texas
Phone: 512-996-4906


ABSTRACT
Verification and Test of Complex Designs: Challenges and Solutions This tutorial aims to provide an overview of key verification and test challenges faced in today's complex designs and describes the methodologies used to overcome those challenges. A survey of state-of-the-art techniques will be presented together with experience on how these techniques are adopted in practice. The discussion will be focused on key areas including functional verification, equivalence checking, symbolic simulation, and design for test. Emphasis will be given to the relationship between verification, validation and test. Promising techniques and research directions for the future will also be presented and discussed.

BIOGRAPHY
Magdy S. Abadir Received the B.S. degree with honors in Computer Science from the University of Alexandria, Egypt in 1978, the M.S. degree in Computer Science from the University of Saskatchewan, Saskatoon, Canada, in 1981, and the Ph.D. degree in Electrical Engineering from the University of Southern California, Los Angeles, in 1985.
Currently he is with Motorola working as the Manager of the High Performance Tools and Methodology Group at the PowerPC Design Center, Austin Texas. Prior to that he was the General Manager of Best IC Labs in Austin Texas. From 1986 to 1994 he worked at the Microelectronics and Computer Technology Corporation (MCC). He is also an adjunct faculty member of the Computer Engineering Department at the University of Texas at Austin. Dr. Abadir has published over 100 technical journal and conference papers in the areas of microprocessor test and verification, test economics, expert systems, and design for test. He founded and chaired three workshops on microprocessor test and verification. He  also co-chaired five workshops on the economics of design, test and manufacturing. He co-edited three books on the subject of test economics.He is a senior member of the IEEE.

 

 

T7: Bio-Inspired Systems
 

 

Hoda S. Abdel-Aty-Zohdy
Professor
Director of the Microelectronics System Design Lab
Department of Electrical and Systems Engineering
Oakland University, Rochester MI, 48309-4401
Phone:(248) 370-2243
Fax: (248) 370-4633
Email: zohdyhsa@oakland.edu

 

ABSTRACT

Bio-inspired systems mimic the intelligence of living creatures and implement it with higher speed and density on integrated system-on-a-chip hardware for applications of wider scope. The tutorial will start by observations and motivations to copy from the living biological systems in intelligent signal processing. Bio-Inspired Systems integrate various intelligent processing approaches such as: Neural Networks (NNs), Genetic Algorithms (GAs), Fuzzy Logic, and Evolutionary Systems We capitalize on each inherent advantage. The tutorial shall present the advantages and limitations  of each approach, with selection criteria for specific applications. NNs are data driven amenable to training and testing under noisy data signals. GAs are global optimizers that take problem constraints fully into account. Fuzzy logic approach is rule based with flexibility in the degree of uncertainty in specifications and they are good in real time control. Evolutionary systems add new dimensions to the applications with new multi-media, multi-phase, and multilevel logic possibilities. The neural network approach is divided into the three classical algorithms for the learning including: Unsupervised (SOFM), Reinforcement, and Supervised. In the tutorial we shall also introduce our own NN approach with synaptic plasticity. Hardware implementation on silicon chips for each of the bio-inspired approaches will be discussed and presented including theory, simulation and circuits design for chip design, testing, and evaluation. Emphasis will be placed on bio-inspired systems for bio-chemical sensing and detection System-on-a-Chip (SoC) applications . Effective bio-inspired system. require: Compact, low-cost versatile sensing devices, intelligent signal processing and perception, and smart and flexible information transmission. In this presentation, various examples of hardware implemented electronic-nose with different approaches, using digital, analog, and mixed signal processing will be presented including our Spiking NN system with 128 inputs and 8-outputs and occupies an area of 0.118 square mm using the 0.16um CMOS technology. Future directions of bio-inspired systems integration with organic and inorganic media via multi-phase, and multi-domain possible interface and integration will also be briefly discussed.

BIOGRAPHY
Dr. Abdel-Aty-Zohdy received the B.A.Sc. degree (with First Class Honors) from Cairo University, the M.A.Sc. and the Ph.D. degrees from the University of Waterloo, Waterloo, Ontario, Canada, all in Electrical Engineering. She is the Founder and Director of the Microelectronics System Design Laboratory at Oakland University. She is Coordinator of the Engineering Physics Program, and an Associate Professor in the department of Electrical and Systems Engineering. Her current research and teaching activities are in Bio-Technology with Bio-Inspired Intelligent Signal Perception and Processing (ISPP), sub-micro-electronics, embedded neural networks and genetic algorithms for novel systems-on-a-chip, Analog ICs, Electronic Nose and other bio-inspired systems. Dr. Abdel-Aty-Zohdy has authored over 135 refereed publications, and more than 100 technical presentations.

Dr. Abdel-Aty-Zohdy has been an AFOSR/IF Visiting Faculty Research Fellow (2003 and 2002), a National Academy of Science/National Research Council Fellow at the WPAFB 2000 and 2001, a Faculty Intern at the Chrysler Technology Center, Advanced Manufacturing Engineering, 1998 and 1997, Consultant to FANUC-BERKELEY MEMS Lab, 1996, DARPA supported Visiting Associate Professor at The University of Michigan, Ann Arbor, Center for Integrated Sensors and Circuits, 1995; Consultant to General Motors Research Labs, ITT, and a summer visiting professor at the Institute for Computer Research, at the University of Waterloo.
Dr. Abdel-Aty-Zohdy presented plenary lectures at the IEEE ECCTD2003, and ICCC2001. She has been the elected Chair for the IEEE/South East Michigan Section-Chapter-I on  Circuits and Systems, Signal Processing, Information Theory, and Control since 2000 She served in numerous IEEE/CAS technical program committees, general co-chair, Track chair, session organizer, and speaker for the IEEE Midwest Symposium on Circuits and Systems, the Organizer and General Chair of the Educational program for the IEEE Custom Integrated Circuits Conference (CICC88). A member of the Steering Committee and technical program for the IEEE International Conference on Electronics Circuits and Systems, IEEE MWSCAS since 93, and the IEEE CICC. She was a member of the Technical Program Committee for the IEEE Great Lakes Symposium on VLSI. She is a member of technical program committee for the IEEE International Conference on Microelectronic Systems Education, MWSCAS, ICECS, CICC, ICM, and MSE. Dr. Abdel-Aty-Zohdy served as the General Chair for the first Collaborative Technologies Workshop in 1999.
Dr. Abdel-Aty-Zohdy is a member of Eta Kappa Nu, Sigma Xi, ACM SIGDA,
AWIS Detroit Area chapter, IASTED, CSEE, EIC, and a senior member and faculty advisor for the Society of Women Engineers.

 

TUTORIALS Timetable

 

 

Time

Room A

Room B

Room C

Room D

9:00 – 10:3 AM

T1

T2

T3

T4

10:30 – 11:00 AM

Coffee Break

11:00 – 12:30 PM

T1(Contd) 

T2(Contd) 

T3(Contd) 

T4(Contd) 

12:30 – 13:30 PM

Lunch Break

13:30 – 15:00 PM

T5

T6

T7

15:00 – 15:30 PM

Coffee Break

15:30 – 17:00 P

T5(Contd) 

T6(Contd) 

T7(Contd)